Brian R. Tauro

5th Year PhD student at Illinois Institute of Technology, Chicago

Biography

I am part of Hexsa Lab at IIT which is led by Professor Kyle Hale and we are interested in the design of systems software for high-performance and parallel computing. As we see hardware scale up–both in terms of the number of interconnected machines and in terms of the number of computing elements on a single chip–We believe it is time to reconsider some of the design decisions that have sustained the popularity of the Linux/x86 software stack for general-purpose computing. Particularly, how should we organize/structure systems software stacks for future massive-scale machines?

Interests

Operating Systems
Compilers
Systems Security
Accelerators
Virtualization

Education

PhD in Computer Science, in progress
Illinois Institute of Technology
M.S. in Computer Science, 2019
Illinois Institute of Technology
B.Tech in Computer Science, 2016
Karunya University

Experience

Operating Systems/Runtime Intern

Samsung SSI

May 2023 – Aug 2023 San Jose, CA, USA

I worked on automatic transformation of MPI HPC code to disaggregated hardware using modern compiler analysis and transformation.

Multi Kernel Intern

Intel

May 2022 – Aug 2022 Hillsboro, OR, USA

Study of interference between HPC and memory dis aggregated applications, where memory dis aggregation mechanisms are implemented in the mOS kernel.

Security Software Research Intern

Intel

May 2021 – Aug 2021 Hillsboro, OR, USA

Develop supply chain post exploitation payloads (similar to SolarWinds), investigate zero day exploits, both using custom payload and metasploit framework to evaluate Intel anomaly behaviour detection model.

Summer Intern

VMware

May 2020 – Aug 2020 Palo Alto, CA, USA

Investigate sources of Jitter in ESXi 7 hypervisor and eliminate them. To understand the sources of Jitter, a detailed analysis of the guest/host software stacks was performed with the help of VPROBES (similar to DTRACE) for collecting fine grained traces from VMM/VMK/Guest worlds and also BPFTRACE/PERF for guest OS analysis.

Research Intern

IIT

Aug 2018 – May 2024 Chicago, IL, USA

Develop speedup models to estimate speedup in multi-kernels (used in super computers).
Built an InfiniBand (Mellanox ConnectX-3) device driver for Nautilus (aerokernel) in C, in order to leverage the advanced features (RDMA, SR-IOV) provided by smart NIC’s to enable low latency communication between applications running in kernel space in Nautilus.
Instrument Linux to understand floating point save/restore register overheads in the kernel.
Implement lazy floating point usage in kernel space in Nautilus (aerokernel) as Nautilus supports floating point operations in kernel space.
Understand OpenMP tasking overheads in order to identify time spent in context switches.
Develop mktrace a system call delegation tool to offload selective system calls to a kernel thread to emulate multi kernel environments (system call delegation) which is very similar to a rootkit which performs system call hijacking.
Built a memory dump tool in Linux for malware analysis using ptrace.
Helped in building a qemu prototype device to evaluate benefits of computation offloading.

Summer Intern

NexLP

Jun 2018 – Aug 2018 Chicago, IL, USA

Worked on multiple projects such as extending Apache Tika (content detection and analysis framework) for advanced data extraction features from documents, OCR Extraction from documents in Java, C#.

Software Developer

Covenant IT Solutions Private Limited

Jun 2016 – May 2017 Coimbatore, Tamil Nadu, India

Integrated e-commerce application with the payment gateway API provided by PAYU for capturing customer payments.
Helped in building the vendor, payment and shipping modules for the e-commerce application.
Played a lead role in migration of e-commerce applications to cloud, hosting and configuring continuous toolchain integration for robust web application development using DevOps framework provided by IBM Bluemix